Challenges In Porting RTL Between FPGA and ASICs
نویسنده
چکیده
The use of Digital Signal Processing (DSP) in electronic products is increasing at a phenomenal rate. FieldProgrammable Gate Arrays (FPGAs), with their multi-million equivalent gate counts and DSP-centric features can offer dramatic performance increases over standard DSP chips. They also offer an attractive alternative for small and medium volume production FPGAs also make very powerful prototyping and verification vehicles for realtime emulation of DSP algorithms [1].
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